Bipolar-Zener Combo Takes On CMOS

https://www.eetimes.com/document.asp?doc_id=1335216

by baybal2 • 7 years ago

108 55 7 years ago

fouric• 7 years ago

The static power dissipation might be a problem, depending on its magnitude, and would only be exacerbated by the increased density. On the other hand, the increased density allows for lower latency relative to CMOS, and latency improvements are hard to come by.

adammunich2• 7 years ago

These are insulated gate transistors so you don't need base current. It might not be too bad actually.

markrages• 7 years ago

If it is Zener-ing, there is some base current, no?

The article says there is "some" static power requirement... that sounds like base current to me.

adammunich2• 7 years ago

This is absolutely incredible, I can't wait to see what foundries adopt the process.

zw123456• 7 years ago

Interesting, here is another link with some additional interesting points: https://www.electronicsweekly.com/news/design/tunnelling-tra...

What caught my eye was this tidbit.... "Analogue computing The last trick up SFN’s sleeve is Bizen analogue blocks – op-amps and comparators (in the PDK), and even analogue computing blocks such as a divider – the analogue computing blocks avoiding using logic – and thus the associated ADC and DAC – in certain applications. Using a coarse-fine architecture, Summerland is predicting 1μW 1μs analogue division instead of ~20 instructions and ~100 instruction cycles if logic was employed. This analogue processing capability is being branded IPU for ‘instantaneous processing unit’."

Analog computers making a comeback ? you never know.

ajuc• 7 years ago

I wonder if using this for low-precision floating point math in graphic cards would make sense.

Maybe it's a way to do realtime raytracing? Who cares if the results have a little noise? It can be even argued it gives it a special "look".

breck2• 7 years ago

Analog computers making a comeback ? you never know.

For dataflow paradigms like deep neural nets it makes sense. If it's significantly faster and significantly more power efficient, and the intermediate states are largely arbitrary weights anyway, what's the point of digital precision.

regularfry2• 7 years ago

It's not the precision, it's avoiding O(n^2) physical connections per layer.

colechristensen• 7 years ago

I guess all you would have to do is to make sure the precision was a few dB/bits more accurate than 16/32/64 bit floating point for a certain sigma probability and a lot of people would be perfectly happy with it.

arcticbull3• 7 years ago

I wonder if you could use it as an efficient starting point for various different integer division algorithms which rely on a rough starting point. For instance, it could be your X_0 estimate for (1/D) in the Newton-Rhapson method [1]. Or, potentially, as a high-quality first stage input for a successive-approximation approach [2].

This could allow you to get a rough approximation incredibly quickly and opt to refine it further using it as a high-quality input to speed up finding the "true" answer.

[1] https://en.wikipedia.org/wiki/Division_algorithm

[2] http://www.ijiee.org/papers/173-E0005.pdf

marcosdumay3• 7 years ago

Probably not analog computers. But analog circuitry, CPU, and power supply all in one package seems likely.

arcticbull3• 7 years ago

Analog computers are incredibly fast for solving some very difficult problems such as integration. I could see, if easy to implement, basically an "analog FPGA" hybrid of digital fabric and analog components for you to piece together.

gumby• 7 years ago

Analog computers making a comeback ? you never know.

Analogue processing may be a superior alternative to GPGPU for implementing neural networks.

slashblake• 7 years ago

Nailed it: https://www.mythic-ai.com/technology/

zozbot234• 7 years ago

I dispute this. The problem with analogue processing (besides noise, of course) is that the dynamic range sucks compared to plain old floating point. Fine for inference, not for training. And most of the compute power in NN is spent on training, inference is trivial.

deepnotderp• 7 years ago

Where does the energy go in neural network workloads?

Wires.

To and from memory, in the memory dice, on the compute die, in the register files, etc.

Check out the paper "DNN Dataflow Choice is Overrated". And that's for the most compute bound cnns!

Edit: and if you think there's enough SNR to make analog "deep" processing in memory work, go make a quick billion dollars by expanding commodity memory with multi level. If you can add another level to flash you'll get rich quick.

whatshisface• 7 years ago

Analog computers making a comeback ? you never know.

The main advantage they're advertising for the analog parts is that you don't need an ADC or DAC. That's not helpful for computers, but it can be very helpful for specialized signal processing parts.

magnat• 7 years ago

What's the likelyhood that Intel, TSMC or some other fab company already stumbled upon the process in r&d and binned (hehe) it due to some unforeseen difficulties making it not worth investing?

zwieback2• 7 years ago

Is there a problem with charge, like in MOSFETs?

mannykannot• 7 years ago

Is this what you are thinking of? "Bizen also does not suffer from CMOS’ electrostatic discharge (ESD) susceptibility and latch-up problems."

m0xte5• 7 years ago

I bet it does suffer ESD issues. Even “SWR proof” RF BJTs are fragile. Anyway not that it matters really here even for CMOS as the ESD protection is just on the die lands. Most of the devices on the thing don’t have ESD protection on CMOS.

tawm• 7 years ago

I think the question is about gate charge.

ChuckMcM• 7 years ago

Pretty cool, I think the rub will be how well they can control the PN boundary and hence the switching thresholds.

The simpler NOR gate was pretty cool too, so their next step should be to build a RAM chip (either a 2 gate equivalent dynamic cell or 4 gate equivalent static cells) If they can do that, then they can show that the process can be controlled well enough for reliable gate fabrication.

Then the step after that might be mixed mode analog/digital circuit paths. Process control gets even harder when you're doing analog as non-linearity propagates and you can't ever get rid of it.

A typical zener[1] has a variance of >100mV for its breakdown voltage. The "easy" analog circuits in my radio need better than 40 dB of dynamic range which is more like 1 mV so 100 times better than a zener. I'll have to read up more on the device physics to see if getting that level of precision or better is really practical.

[1] http://www.vishay.com/docs/84830/plzseries.pdf

magicalhippo2• 7 years ago

A typical zener[1] has a variance of >100mV for its breakdown voltage.

My interpretation was that that was the point of the substrate biasing:

"A second tunnelling junction, represented by two horizontal lines in the device diagram, biases the device so that it is ‘on’ (but not saturated) when the tunnel terminal is open-circuit. While this represents a continuous current flow to ground during operation, tunnel current is typically only 2-5nA [...]"

hthtegr• 7 years ago

Does the quantum tunneling have a lower limit on node size?

This is being developed it seems to keep a 1um fab competitive, but does it also apply to smaller nodes?

m0xte5• 7 years ago

It’s got a terrible reputation on repeatability on a process. One reason tunnel diodes never went anywhere. They were expensive, tetchy and unreliable!

dfox• 7 years ago

There was one big application for tunnel diodes: fast comparators. IIRC many classic Tek scopes use tunnel diode based comparator in their trigger circuitry.

On the other hand doing the same thing in some modern bipolar process is significantly cheaper and more reliable.

Another thing is that in such designs the tunnel diode looks like it does nothing. And that may have something to do with most engineers not using it.

robocat• 7 years ago

What is "plasma metal edge" and "wet edge metal"?

The article is a unique usage of these words in that order...

Edit: generally the article feels a bit like word salad for April fools (however, I only have an undergraduate EE knowledge of transistor design, so there's a lot I don't understand in there).

Edit 2: if it were a good chance to become a breakthrough tech, why is it missing deep VC level funding to get it to market? I know it's not software, but neither is it limited by FDA regulations!

baybal2• 7 years ago

It is how you etch the metal-device contact. Using liquid or plasma.

Plasma etch is more expensive and slower, but is easier to control.

Edit 2:

Electronics is not in vogue with those people. Just like in computer science, the few breakthroughs that matter in last few decades went by nearly completely anonymous despite their enormous utility, but every cat video website gets... you know.

campfireveteran• 7 years ago

EEVblog (Dave) entered the chat

hope he makes a video about this development.

satya71• 7 years ago

This looks interesting, but it's very early days. No mention of reliability, variation, interconnect (modern CMOS processes have 8-10 layers of interconnect). Certainly not taking on CMOS anytime soon.

Bipolar-Zener Combo Takes On CMOS

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