The Ampere Altra Max Review: Pushing It to 128 Cores per Socket

https://www.anandtech.com/show/16979/the-ampere-altra-max-review-pushing-it-to-128-cores-per-socket

by pella • 5 years ago

91 25 5 years ago

Syonyk• 5 years ago

That was about as expected. Going to 128 cores for cache-resident compute workloads helps, it hurts for anything else. That is a seriously cache starved chip... only 16MB SLC?

Even with 1MB of L2... that's still a cache starved chip. The new iPhone has almost as much cache on it!

That said, I would absolutely love some sort of mid-range ARM desktop (that isn't Apple). There are the "small workstation" class ARM boxes (quite a few thousand dollars, 64 cores or so), there are the various small board ARM computers (4-6 cores, $100), and... there's really nothing in the middle.

Give me 4 X2 cores, a cluster of A74s clocked hard, and put it in a NUC type case with at least 16GB of RAM, preferably more, and some NVMe.

Teknoman1172• 5 years ago

Have you seen the honeycomb lx2? It has 16 cortex a72 cores @ 2.0 GHz, USB 3.0, quad 10G Ethernet, PCIe, and supports up to 64 GiB of DDR4-3200 in SODIMM format. Performance wise it’s around a x86 quad core from a few years ago.

https://shop.solid-run.com/product/SRLX216S00D00GE064H09CH/

It $750, but it’s the only thing that comes to mind. There’s a $1000 variant that adds 40 GbE support.

mhh__• 5 years ago

That's a lotta money for not much oomph. Single threaded performance is probably going to hurt, not everything is a SPEC benchmark ;)

adrian_b• 5 years ago

Unfortunately, the more than 6-year old Cortex-A72 cores are really obsolete.

Especially when having many ARM cores, it is desirable to have cores that support at least the ARMv8.2-A ISA, which corrects the initial mistake of the 64-bit ARM ISA of omitting the atomic instructions.

Actually the mistake was corrected in ARMv8.1-A, but all easily available ARM cores support either ARMv8.2-A (Cortex-A55, Cortex-A75 and newer, also NVIDIA Carmel) or ARMv8.0-A (Cortex-A73 and older).

If you want to experiment with many ARM threads and how to organize the synchronization and communication between them, the results on ancient Cortex-A72 cores can be misleading.

Sadly the vast majority of ARM vendors offer only very old ARM cores. Except for the chips intended for mobile phones, the only devices with not too old ARM cores are slow devices with quadruple Cortex-A55 cores.

If you want more threads than that, the best that can be found would be an 8-core NVIDIA Xavier AGX or a 6-core NVIDIA Xavier NX.

An 8-core Xavier might actually have a speed not much different than a 16 core Cortex-A72, even if the NVIDIA cores are relatively slow when compared with more recent ARM cores, i.e. Carmel is a little slower than Cortex-A75.

Buying a Honeycomb lx2 makes sense only when your interest is in the multiple 10G Ethernet and you do not care about what kind of CPU is provided on the board, i.e. you are not interested in the board as a software development platform for future ARM devices.

JohnJamesRambo• 5 years ago

Can anyone provide insight into who buys that sort of device? It seems kind of pricey for what you get.

Uberphallus• 5 years ago

My thoughts exactly. Can be also useful for certain high volume workloads as you pass through data once and cache isn't all that useful.

But otherwise it is severely deprived of cache for anything in the middle.

rowanG077• 5 years ago

well soon you can get a mac mini. It's doubtful you could get a better bang for your buck elsewhere.

TradingPlaces• 5 years ago

I think the upcoming Qualcomm-Nuvia chip will be what you want

volta83• 5 years ago

You can get an Ampere Altra Q32-17 with 32 cores at 45W TDP.

dragontamer3• 5 years ago

That was about as expected. Going to 128 cores for cache-resident compute workloads helps, it hurts for anything else.

It looks like it has really good SPECjbb? I assume Java is non-cache resident? (Especially if SPECjbb is designed to emulate server-scale tasks). If anything, the SPECjbb results come full circle IMO: the large caches of Intel/AMD no longer help, and you're back to latency bound (Maybe??). Its very curious to me that this 16MB / 128core part is out performing the 32MB / 80core config on so many benchmarks.

I think you're right in that this processor has very little cache (and no hyperthreading). But it seems to just get around that issue by having a crapton of cores. If things are waiting on memory, it just brute-forces more cores to do more things.

I can't help but think that SMT2 or SMT4 would really help here. I have to imagine that most of those cores are waiting on RAM, given this architecture. Or maybe they ran the math and decided that 128 threads was enough to saturate the memory channels already?

I dunno, memory latency is always a killer, especially since this architecture has so little cache. My instincts suggest that SMT would still help.

cogman10• 5 years ago

IDK what SPECjbb does, but it really sort of depends on a lot of factors around how the JVM was setup.

The JVM CAN be fairly cache friendly in the case where allocations are used relatively close to one another. The JVM will (typically) keep memory allocated at the same time in roughly the same memory region.

LeifCarrotson• 5 years ago

I'm curious what workloads are suitable. You do have eight channels of 25 GB/s DDR4-3200 bandwidth (theoretically 200 GB/s) and 128 lanes of 2 GB/s PCIe 4.0(theoretically another 256 GB/s) to feed the thing, but getting it to make efficient use of those peripherals is another question altogether.

MayeulC• 5 years ago

As we are witnessing multiple relatively small companies entering the server CPU market, it would be a really great thing if they could standardize on a compatible socket.

This way, instead of designing a motherboard for a single CPU vendor in a small market, integrators could target all of them at once.

Intel reportedly keeps changing sockets to please OEMs who want to sell motherboards; I would be happy to see something change in that landscape.

Otherwise, I'm extremely pleased to see more options are starting to become viable (again).

cameron_b• 5 years ago

If you abstract that ask just a bit there is already an answer, although it's more of an industrial answer. the COM-Express Spec is something of this Universal socket [0]

And while all of that link above looks like a creamy beige box cringefest, the COM-HPC[1] interface is being used for some heavy-hitting systems including Xeon and Ampere Altra [2]

So, yea, you can get this in something more interoperable.

0 - https://www.picmg.org/openstandards/com-express/

1 - https://www.picmg.org/openstandards/com-hpc/

2 - https://www.ipi.wiki/pages/com-hpc-altra

dragontamer3• 5 years ago

If you abstract that ask just a bit there is already an answer, although it's more of an industrial answer. the COM-Express Spec is something of this Universal socket [0]

So are PCIe slots, except GPUs seem to have won on that front (RIP Xeon Phi).

Moving forward: PCIe 5.0 is having more-and-more atomic instructions execute over the PCIe 5.0 specification. Its looking like PCIe 5.0 will have cache-cohesive, in particular, the Compute Express Link (CXL).

So PCIe is looking more-and-more like a "standardized socket", rather than an I/O mechanism.

jeffbee• 5 years ago

Does that LLVM comparison make sense? It seems to target the native platform, which doesn't seem like it would make for a valid comparison between x86 and arm.

tyingq• 5 years ago

Maybe for the relative 1 socket / 2 socket differences.

The Ampere Altra Max Review: Pushing It to 128 Cores per Socket

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