pensono

Love using tester army to validate PRs against my preview environment. Skips the manual check much of the time and helps me ship more confidently.

This technique is pretty similar to Operational Transformations, except that it requires an authority for serialization and must re-apply any state which is out of sync.

Is C++ complex enough that it is difficult to model, and therefore hard to apply in formal methods?

FPGA latency is also much more predictable. Since you have cycle level control, you can know exactly how long any given operation will take. In a multi-threaded CPU, it's likely that the operation may be interrupted or delayed because of another process using the same resourt.

It's also worth noting that FPGAs are often much closer to the I/O than a CPU on a motherboard. Pin to pin latencies are much reduced in a situation where direct access to I/O is available. An Ethernet stack can sit on the same silicon without having to serialize data between the CPU and the north bridge.

This article seems to be targeted toward embedded programming, so global state isnt that big of a deal because you have complete control of the chip. It's quite common to not even have threads or an operating system at all.

American grocery stores have been doing this for a long time as well. Often their products taste better too because they use less added sugars and preservatives.

Have you tried bitwig? It's fairly new and seems to do alot of things right.

I have a feeling that much of the cost is from the smaller market. It takes a massive amount of engineering resources to put out a new chip, and you need slot of sales to compensate. If FPGAs become commonplace in servers, then we will see a price decrease as it becomes easier to recouperate the overhead.