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pbalcer

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www.youtube.com 1y ago

Intel's Big AI Bet: Gaudi 3 Ft. Supermicro – System Tour, PyTorch, More [video]

pbalcer
2pts0
www.servethehome.com 2y ago

Nvidia Shows Intel Gaudi2 Is 4x Better Performance per Dollar Than Its H100

pbalcer
4pts0
discourse.llvm.org 2y ago

Add Full Support for the SYCL Programming Model (to LLVM)

pbalcer
1pts0
www.servethehome.com 2y ago

Numenta Has the Secret to AI Inference on CPUs Like the Intel Xeon Max

pbalcer
2pts0
www.intel.com 3y ago

Accelerate Llama 2 with Intel AI Hardware and Software Optimizations

pbalcer
1pts0
pmem.io 3y ago

Exploring the Software Ecosystem for Compute Express Link (CXL) Memory

pbalcer
1pts0
www.youtube.com 3y ago

Silicon Valley Bailout [video]

pbalcer
5pts0
www.youtube.com 3y ago

Active Cooling Maximizes Heat Removal Better Than a Fan [video]

pbalcer
5pts0
www.ft.com 3y ago

Can Intel Come Back?

pbalcer
19pts23
www.youtube.com 3y ago

How Big Budget AAA Games Render Clouds [video]

pbalcer
6pts0
arxiv.org 4y ago

First-Generation Memory Disaggregation for Cloud Platforms

pbalcer
2pts0
9to5google.com 4y ago

Google purchasing and expanding its Warsaw office for $700M

pbalcer
109pts72
camel.kaist.ac.kr 4y ago

CXL-Based Direct Accessible, High-Performance Memory Disaggregation Framework [pdf]

pbalcer
2pts1
pmem.io 4y ago

Leveraging asynchronous hardware accelerators (DSA) for fun and profit

pbalcer
1pts1
www.youtube.com 4y ago

Apple Inc vs. Apple-Man: trial proceeding. My message to Apple [video]

pbalcer
4pts0
pmem.io 4y ago

Disaggregated Memory (CXL) – In pursuit of scale and efficiency

pbalcer
5pts0
www.nytimes.com 4y ago

Fake News on Facebook Helped Fuel a Border Crisis in Europe

pbalcer
8pts3
www.youtube.com 5y ago

Architecture All Access: Intro to Quantum Computing [video]

pbalcer
2pts0
spdk.io 5y ago

80M I/O Per Second with a Standard 2U System

pbalcer
85pts39
www.servethehome.com 5y ago

CXL in Next-Gen Servers Will Make Today's Servers Obsolete

pbalcer
2pts0
www.youtube.com 5y ago

Under the Hood of an Exadata Transaction – How We Use Persistent Memory [video]

pbalcer
2pts0
www.youtube.com 5y ago

Architecture All Access: Modern FPGA Architecture [video]

pbalcer
4pts0
www.youtube.com 5y ago

Architecture All Access: Modern CPU Architecture [video]

pbalcer
1pts0
hazelcast.com 5y ago

Using Persistent Memory in Hazelcast

pbalcer
1pts0
www.servethehome.com 5y ago

Glorious Complexity of Intel Optane DIMMs and Micron Exiting 3D XPoint

pbalcer
3pts0
pmem.io 5y ago

Heterogenous Memory Systems: Using Memkind in Hazelcast

pbalcer
3pts0
blogs.oracle.com 6y ago

Persistent Memory Primer

pbalcer
1pts0
pmem.io 6y ago

Performance of Persistent Memory: 300 nanoseconds

pbalcer
110pts30
azure.microsoft.com 6y ago

Next Generation SAP HANA Large Instances with Intel Optane

pbalcer
1pts0
pmem.io 6y ago

Performance of Persistent Memory: 300 nanoseconds

pbalcer
9pts0

Readable code is code that has empathy for the reader and tries to minimize the cognitive load of interpreting it. That's one of the goals of abstraction layers and design patterns.

Yes, it's all subjective, and depends on the reader's expertise and existing familiarity with the codebase. But arguing that code readability isn't at thing, because it's subjective, is an absurd take. Would you claim that Joyce's Ulysses is equally readable as Seuss's The Cat in the Hat?

You'd be surprised how complex a typical memcpy implementation can get to eke out all the performance out of a platform for all the possible scenarios. And while I agree it might not be considered an algorithm in the strictest sense, in response to OP's question, I think memcpy is an apt comparison.

SteamOS is a much more streamlined console-like experience for gaming. Even things as simple as system updates is far less annoying on Linux/SteamOS than it is on Windows. This is especially important in, for example, a set-top box media PC you might want to have for your TV and you don't run every day. And, over time, as SteamOS in its various forms becomes more and more popular, game publishers will be motivated to support it. Many already are, from Steam Deck alone. And, in a few years, it's possible that a "casual PC gamer" will actually prefer the far more plug-and-play SteamOS experience versus the Windows one (which, I, for one, highly dislike, but I understand that's a preferences thing).

One of the reasons why they can do unified memory efficiently is because the CPU/GPU is a single SoC. If you separate them, you end up with a normal PC architecture, with memory having to go through a PCIe bus. This is possible to do with reasonable latency and bandwidth (thanks to CXL), but we haven't seen that in consumer hardware. Even in server space I think only MI300 supports CXL, and even then I don't think it's something AMD particularity promotes.

Personally I think Strix Halo workstations may come with expendable memory, storage and free PCIe slots. But then you have to deal with ROCm...

Disclaimer: I work on this stuff for Intel

At least for Intel, that is just not true. Intel's DPC++ is as open as it gets. It implements a Khronos standard (SYCL), most of the development is happening in public on GitHub, it's permissively licensed, it has a viable backend infrastructure (with implementations for both CUDA and HIP). There's also now a UXL foundation with the goal of creating an "open standard accelerator software ecosystem".

I've been using Gemini-1.5-Pro-2M through Poe for creating e-book recaps and just generally interactively jogging my memory about a prior entry of a book in a series when a new one comes out. It's been working surprisingly well, even for very large books.

Qualcomm and other ARM manufacturers creaming them on AI stuff

That's mostly on Microsoft's DirectML though. I'm not sure whether AMD's implementation is based on ROCm (doubt it).

These are consumer-grade mobile and laptop chips. That are going into products that won't get sold in the US anyway. Oh, and other Chinese companies, that do sale their products in the US, like Lenovo or Oppo, can get these same chips no problem.

So all this is doing is harming Intel and Qualcomm, while incentivizing Huawei to invest even more in domestic chips.

It would require a reverse lookup structure from address to buffer handle, e.g. red-black tree. Maintaining it would no longer be O(1).

Not necessarily. If you are able to map a block of normal memory in a known location relative to the GPU memory that you are managing with an "offset allocator", it should be possible to directly calculate the metadata location for each "offset". This is how most allocators find arenas/buckets (whatever you want to call them) for an allocation by a pointer.

Something like this:

  +-------------------------+ 0x000000 (start of managed memory)
  | Metadata                | 
  |                         |
  |                         |
  | ...                     |
  +-------------------------+ 0x001000 
  | Padding ...             |
  +-------------------------+ 0x010000
  | GPU Memory Block        |
  |                         |
  |                         |
  |                         | ~2MB block
  |                         |
  |                         |
  |                         |
  +-------------------------+ 0x210000
With this layout, to get to a metadata for an allocation, all you need to do is to align down the allocation pointer and calculate the appropriate location in the metadata page.

This obviously won't work in all scenarios, but it's a simple and practical way around a map lookup.

Just curious, how does this work out in terms of TCO (even assuming the price of a Groq LPU is 0$)? What you say makes sense, but I'm wondering how you strike a balance between massive horizontal scaling vs vertical scaling. Sometimes (quite often in my experience) having a few beefy servers is much simpler/cheaper/faster than scaling horizontally across many small nodes.

Or I got this completely wrong, and your solution enables use-cases that are simply unattainable on mainstream (Nvidia/AMD) hardware, making TCO argument less relevant?

That's what I have (RX 7900XT on Arch), and ROCm with pytorch has been reasonably stable so far. Certainly more than good enough for my experimentation. Pytorch itself has official support and things are pretty much plug & play.

The reason is physics. NAND just isn't fast enough (and requires firmware wear-leveling, which can mess up latency) for this to be practical.

it's possible to get <1us with Optane PMem (the dimms) in fio, you just need to use the memory-specific engines so that it avoids the fs/block layer.

The point is that on PMem that is simply "sfence", and not a potentially super-expensive "fsync" syscall... Fsync is an fsync, not a memory barrier...

On a tangentially related note, big companies often say that they perform pay benchmarking by contributing compensation data to third-parties to then determine the market rate for employees. After reading the article, it strikes me as a very similar process, just for a different type of market (housing vs labor).

Did anyone try to challenge pay benchmarking in court?

+1. This is one of the most underappreciated things about the x86 CPU ecosystem. The documentation is usually solid, and all the Linux drivers are fully open-source and well maintained. Both AMD and Intel are almost always among the top contributors to each Linux kernel release. Hopefully Qualcomm follows suit, and does better than they do with Android... Closed source driver blobs are the worst. I personally wouldn't buy a desktop computer that doesn't at least have an option of running fully with open source drivers.

UltraRAM 3 years ago

no, that won't work. You'd have to clflush after every store. And even then, the cacheline might only ever get to the write pending queue (wpq) - and that you can't control.

I'm not arguing that Sony are saints and Microsoft is the devil. I agree that Gamepass is awesome value and forced Sony to improve their PS+ offerings (competition is awesome!). However, there's a stark difference between Sony buying and investing in game studios after a long partnership (like in the case of Naughty Dog or Insomniac Games), which allows those studios to create bigger and more ambitious games, and Microsoft snapping up multiple large, well funded and profitable, game publishing companies. All I'm really trying to say is that the former deploys capital to fund new games in order to gain market share by competing on quality of the product (which is clearly working for Sony), whereas the latter is deploying capital to just snap up market share directly...

Sony has created or acquihired many of its first party studios that develop original IP specifically for PlayStation. Or they just fund third-party studios to create new exclusive games. You could argue that, if not for Sony, many of those games wouldn't even exist. In recent times, from what I can recall, the only large studio that Sony acquired was Bungie. Which is tiny compared to Bethesda or Activision, and continues to support and release (Marathon) new games on Xbox and Windows.

Now compare this to what Microsoft is doing. They mostly failed to create good first party games on their own (apart from a few gems), and are now resorting to buying up not just individual game studios but whole publishers in order to make their games exclusives to their own platforms.

What Sony is doing is creating real value to players. What Microsoft is doing is primarily meant to create value for shareholders. As a gamer, I strongly prefer the former.