mithro

https://www.linkedin.com/posts/hirosh-dabui-a5367443_linux-r...

The design was taped out on the first wafer.space run (see https://github.com/wafer-space/ws-run1) but I have not heard if it actually worked or not.

wafer.space has just opened our first pooled manufacturing run of GF180MCU with the purchase deadline of 28th Nov 2025.

Think of it like OHS Park for silicon!

You provide a 20mm2 design in the open source GF180MCU technology and you get back 1,000 parts. You can used an existing template or build something completely yourself with either open source or proprietary tooling (no required pad ring or management CPU).

Things like my https://wafer.space ($7k USD), TinyTapeout.com (<$200 USD) and ChipFoundry.io (~$15k USD) are making it much cheaper to do IC design.

There are a huge number of designs from Tiny Tapeout which are all public - see https://tinytapeout.com/runs/

The designs are still more in the MCU size, but you have to start somewhere!

The Google open MPW program also had 10 runs with 40 projects published at http://foss-eda-tools.googlesource.com/third_party/shuttle/ -- All the submissions had to be open source and there were 1000+ of those. I did try pitching to multiple Google Research groups that continuing the open MPW funding would grow the available designs which have been manufactured and that was useful for AI training but didn't get any bites.

The now defunct Efabless also ran a number of challenges in this space which got pretty good results, see https://efabless.com/challenges

There is plenty of updates on the website at https://theopenroadproject.org/ - Including a pretty good report on what happened in 2024.

Also take a look at the Open Source EDA BOF from the DAC conference - https://open-source-eda-birds-of-a-feather.github.io/

The team at Antmicro put together this pretty cool visualisation flow for this stuff using only open source tools -> https://antmicro.com/blog/2023/11/open-source-signal-integri...

https://antmicro.com/blog/2022/01/fomu-keystroke-injector/

I also have a general offer to send people who contribute to the open source FPGA tooling and ecosystem free Fomu boards.

The Tomu family also has;

- The Fomu (FPGA Tomu) - https://fomu.im/ and https://workshop.fomu.im/

- The Qomu (ARM+eFPGA Tomu) - https://tomu.im/qomu.html

- The Somu (Secure Tomu) - https://www.crowdsupply.com/solokeys/somu

The Fomu is also a great RISC-V MCU prototyping platform.

I afraid I don't recall the status of DSP blocks in the open source toolchains for Xilinx hardware. Even if the basics are supported I'm sure there are plenty of DSP features that are not.

Many configurations of VexRISCV work fine without using the DSP blocks (and has been working for 2+ years), so not sure that is relevant.

I have a Google Doc at <https://j.mp/softcpus-on-fpgas> which includes a bunch of information about what type of performance has been achieved on modern Xilinx FPGAs.

You can generally do quite a bit of parallelism, see the quad-core LiteX+VexRISCV solution at <https://antmicro.com/blog/2020/05/multicore-vex-in-litex/>.

The open source toolchain doesn't quite support the PCIe interface yet but all the other stuff should work in theory.

The best place to see what works is the F4PGA examples documentation at <https://f4pga-examples.readthedocs.io/en/latest/building-exa...>.

If you want to start with fully open source tools on a Xilinx 7 series FPGA the best option is the Digilent Arty A35T board <https://digilent.com/shop/arty-a7-artix-7-fpga-development-b...>.

When did you last check? The Yosys+VPR toolchain currently supports a full Linux capable SoC with Ethernet and DDR memory on the Arty A35T (which has a Xilinx Artix 7 part), see the example at https://f4pga-examples.readthedocs.io/en/latest/building-exa...

While the news seems to focuses on ML and RISC-V, there is a huge amount of *other* activity in the silicon space. With [Google working to improve the open source EDA tools + PDKs while also providing free manufacturing](https://opensource.googleblog.com/2022/05/Build%20Open%20Sil...) there are lots of opportunities.

The "new" FPGA companies like GowinSemi and RapidSilicon are also creating some pretty cool parts.

Checkout Surelog - https://antmicro.com/blog/2020/12/ibex-support-in-verilator-... and the more recent usage in https://github.com/siliconcompiler/siliconcompiler

On a semi-related note, Google has also been investigating in improving support for SystemVerilog support in open source tooling -> https://opensource.googleblog.com/2021/09/open-source-system...

All these are good points but missed a key thing.

The interchange format includes a computer readable description of the FPGA which tells the tooling what is available inside the FPGA and how they can be connected.

Except that nextpnr is one of the tools supporting the interchange format and you can see the status at https://symbiflow.github.io/fpga-interchange-tests/

Project F (https://projectf.io/posts/fpga-graphics/) has a lot of cool examples with visually interesting output.

If you are motivated by learning rather than practical usage, FPGAs are a great way to learn more about how things like CPUs or peripherals can be designed. It is also a way to understand how to evolve hardware and software at the same time.

Two examples that I have been loosely involved with; * Google's CFU playground which is all about profiling and adding small number of new OpCodes to build an accelerator for a specific ML model (http://cfu-playground.rtfd.io/). * The Fomu workshop (https://workshop.fomu.im) which walks though treating an FPGA like an embedded MCU where you can then modify the MCU!

Google has been working on solutions to make it easier to explore this type of issue (and mitigation techniques), see https://opensource.googleblog.com/2021/11/Open%20source%20DD...

Google is working on platforms to make this easier to explore this problem, see https://opensource.googleblog.com/2021/11/Open%20source%20DD...

Does Speedify have an open source client?

I'd be interested in paying for the service but not willing to run closed source software locally and then send all my traffic to it.

FWIW Google is working on improving the support for SystemVerilog in open source tools.

On the developer tooling side, there is https://github.com/google/verible for linting, code formatting and code indexing.

On the actual compilation side with there are https://github.com/alainmarcel/Surelog and https://github.com/alainmarcel/UHDM which are then being coupled with open source tools like Yosys to allow targeting Xilinx 7 Series and Lattice ECP5 FPGA ICs with fully open source flows using fully open source FPGA tools like symbiflow.github.io

This is pretty cool but I think it doesn't focus enough on the fact that code which isn't run / tested regularly is most certainly broken.

Some friends at Antmicro developed a little tool called "tuttest" (https://github.com/antmicro/tuttest) designed to enable you to run your code examples on CI. It still needs a lot of work but we are starting to use it in a lot of places. The tool in the future could potentially use a docable compatible metadata for the best of both worlds!

If you buy the Tomus from CrowdSupply (https://www.crowdsupply.com/sutajio-kosagi/tomu) it comes injection molded case designed by Sean 'xobs' Cross (who actually ran the campaign).

Doing plastics is well outside my skill set, so it was awesome to see him do that! xobs posted about the case here -> https://www.crowdsupply.com/sutajio-kosagi/tomu/updates/fina...

Sadly, I don't think there is a bigger EFM32 which has the same footprint but maybe they have released new parts since I last looked.

IIRC GnuK uses the chopstx library which has already been ported (see https://github.com/im-tomu/chopstx). Not sure what else would need to be done?

If you think you can do better, please do! I will be sure to buy plenty when you deliver your cheaper version.

The idea is to be an open source, cheap replacement for an Yubikey Nano style devices (and hopefully in response they will price their devices more reasonably than the >$50 USD it costs now).

I would love what happened to the "blue pill" to happen to the Tomu board. It would be awesome for Chinese manufacturers to take the design and make cheap clones.

Buy a 100 pack, then they are only $9.05 each, which while still more expensive than the ESP8266s (at ~$7.00) is getting closer. The devices from CrowdSupply all ship with nice injection moulded cases.

You are also quite welcome (and encouraged) to build your own!

The schematics, PCB and even case design are open source. The board is designed with 6mil/6mil design rules making it compatible with everything like OHS Park, Seeed, or Dirty PCBs (all of them have been previously tested). The Tomu being so small with the Dirty PCB protopack would get you like ~75-125 boards for like ~$25 USD. All the other parts are available from Digikey too.

The idea is to be an open source, cheap and hackable replacement for an Yubikey Nano style devices (and hopefully in response they will price their devices more reasonably than the >$50 USD it costs now).

It would be awesome for Chinese manufacturers to take the design as is and make cheaper clones.

We have a policy of sending anyone who sends the project pull requests free Tomu boards.