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mattthebaker

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You can draw a small amount of current from the logic signal in high state and store it in a small amount of capacitance, a low enough power device would be able to operate off of it. There is a class of sensors which use and interface called 1-wire which is ground and signal/power (2 pins).

You don't need a very accurate clock (quartz) for ~100 Mhz SPI. A ring oscillator is just a chain of inverters. If you want to match the bus frequency accurately you can train a PLL against the signal clock.

Not sure what the point is about the pullup, to flip the bit you need only to overpower the output buffers of the other chip.

Cramming it all in a 0402 would be a stretch but I could see it being possible with the right resources. Having only 2 pins would be pretty useless if you can't snoop the address though. And modern NOR devices on a motherboard is almost certainly using the high speed 4 pin serial interface rather than standard SPI.

What do you do with 8MB when the OS is 512MB+? Adding NOR Flash is normally pretty simple -- No bad blocks and a standard SPI interfaces most embedded devices have controllers for. The high end controllers can typically map NOR flash directly into the system address space.

Raw NAND is highly preferable to SD or USB drives. You can at least have wear leveling in the OS/FS. SD/USB are bad because most have dumb controllers and just rewrite a page when it changes. Raw NAND is also consistent and meets datasheet specs, whereas SD you never know what you are getting.

The number of electrons in a flash memory cell is in two digits.

I had worked on one of the last TLC NAND designs before the transition to 3D. You could only afford to leak 1 electron per year to meet the data retention spec... TLC did not make it market on that process/node.

Tampering with evidence, which includes destroying evidence is also a crime. IANAL so I'm not sure at what point a phone becomes evidence, i.e. once there is a indictment, once there is a warrant, t=0, etc. John Carmack got in trouble for deleting emails in that IP case if I recall. A better privacy feature might be that the phone stores no history.

If I had to estimate "common and noticeable" sightings based on our old office near twitter and my experiences:

Homelessness -- multiple per block

Excrement -- every other block

Public drug use (non pot) -- every other day

Public urination -- once per week

Public defecation -- once per month

I was assaulted at the street corner near our office once in the 1.5 years we were there.

My guess is that the homeless population is just too large to manage any reasonable degree of cleanliness.

Intel lost out on the mobile revolution because the mobile revolution was about radio technology and not processor technology. Outside of buying Qualcomm for patents and radio designs, anything Intel could have tried was doomed to fail.

I would not rule out 3D from processors yet. Such an invention would be able to reduce die size and likely cost. Heat density is probably the real problem and may need some additional inventions.

The 3D memories will probably see some planar (x-y) scaling, they just don't need all of their scaling from it. 3D scaling will still increase bits/die area, and thus reduce $/bit. If doubling the stacking height doubles capacity but adds 30% to wafer cost with extra processing steps, its still much more efficient than 100% cost for two wafers of the previous design.

Scaling efficiency shouldn't be too dissimilar from planar scaling, at least until the next wall is hit.

Its also company policy that you should be fired on the spot for sleeping at your desk -- some kind of hold over from manufacturing that makes no sense for most office positions.

Risk exposure to lawsuit is incomparable to the relationship case but it was consensual.

PCM to Micron is an existing product/design that is NOR-Flash like but utilizes PC material as the storage medium.

3D XPoint is said to be able to stack the storage medium on the die and requires no access transistor -- which "PCM" has. So it is based on PC material but has some new kind of selector.

The 3D/stacking part is important for scaling/density -- even NAND-Flash has hit 2d limits and gone vertical.

Police just need to start issuing tickets. Seems like a solid and easy revenue stream. Both riding on the sidewalk and riding without a helmet is illegal. Haven't seen any rider wearing one.

CA Law: "An operator of a motorized scooter must be at least 16 years old, possess a valid drivers license or instruction permit, and wear a helmet.

A motorized scooter may be operated on a bicycle path, trail or bikeway, but not on a sidewalk. On the roadway, it must be operated in the bicycle lane, if there is one. On roads without bicycle lanes, motorized scooters may operate where the speed limit is 25 mph or less, and shall be ridden as close to the right hand curb as possible, except to pass or turn left."

Honestly, having children is one of the most selfish things you can do. I.e. thinking your genetic material is special and passing it on to another person in an overcrowded world. Any “sacrifice” in raising a child is not — they are half you and an extension of self.

Intel NVM Systems and Micron have been partnered since the early days of both of their starts in NAND. Investment in R&D and fabs are shared between the two companies. Intel is largely pushing 3DXP down the pipe from the CPU groups as a performance advantage. If/when it really takes off, they will need added support/investment from Micron to increase supply, reduce risk, etc.