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This is more of a "Can you fake being a robot?" test.

Doesn't pretty much every language nowadays have foreach loops that don't require keeping an integer index around when iterating over elements? That seems like a way better idea.

Oh god, T9 text input is back. Would be interesting to see how it can work with modern autosuggest, though.

How is this different from PIX for Windows (https://blogs.msdn.microsoft.com/manders/2006/12/15/a-painle...)? Is it just an update for DX12?

d3 Technologies | London (software) or NYC (sales) | Full-time, onsite http://www.d3technologies.com/contact/jobs

d3 Technologies (unrelated to d3.js) develops an integrated visual video production suite and custom hardware for running high-end and complex events, shows and installations.

We're looking for a Windows generalist (Visual Studio, C++, Python, DirectX, OpenCV, ZeroMQ) interested in high-performance, LAN distributed, soft real-time systems.

We're growing fast, with two new offices opened in the last year (NYC and HK), and are looking to branch out into more cloudy technologies too. The team includes an interesting mix of creatives, networking/linux nutters (ie. me) and gamedevs.

The interview process includes a simple code test.

I probably should've added "potentially" as my personal sample size is one ;)

* Jordan Inkeles, Altera's director of product marketing for high end FPGAs

Speaking in 2012, Danny Biran – then Altera’s senior VP for corporate strategy – said he saw a time when the company would be offering ‘standard products’ – devices featuring an FPGA, with different dice integrated in the package. “It’s also possible these devices may integrate customer specific circuits if the business case is good enough,” he noted.

There was a lot going on behind the scenes then; already, Altera was talking with Intel about using its foundry service to build ‘Generation 10’ devices, eventually being acquired by Intel in 2015.

Now the first fruit of that work has appeared in the form of Stratix 10 MX. Designed to meet the needs of those developing high end communications systems, the device integrates stacked memory dice alongside an FPGA die, providing users with a memory bandwidth of up to 1Tbyte/s.

“A few years ago,” said Jordan Inkeles, director of product marketing for high end FPGAs, “we partnered with Intel for lithography and were very excited. We also looked at Intel’s packaging technology and asked ‘can we use that?’. The answer was ‘yes’. The combination has allowed us to do things we thought were not possible.”

The concept is based on what Altera – now Intel’s Programmable Systems Group (PSG) – calls ‘tiles’. Essentially, these are the dice which sit alongside the FPGA. Tiles are connected to the FPGA using Intel’s EMIB – embedded multi-interconnect bridge – technology. “It’s not a traditional silicon interposer,” Inkeles explained. “It’s a little bridge chip which is used where you need to connect two pieces of silicon.”

* Statix 10 MX is said to combine the programmability and flexibility of STratix 10 FPGAs with integrated 3D stacked high bandwidth memory devices

Stratix 10 MX devices are designed to help engineers solve demanding memory bandwidth challenges which can’t be addressed using conventional memory solutions. The parts integrate four stacks of HBM2 DRAM, each with up to four memory dice. PSG says the parts are suitable for use where bandwidth is paramount. Apart from providing 10 times more memory bandwidth than conventional solutions, Stratix 10 MX devices are said to be smaller and to use less power.

“This idea of integrated chips opens up things,” Inkeles said. “FPGAs are trying to be everything to everyone. They have to support wireless, wired, networking, radar and high performance computing, amongst others. We saw divergence in what was possible.”

PSG started thinking about transceivers. “If we had transceivers in separate tiles, we could come out with devices for different markets,” Inkeles continued. “It also makes sense for analogue, which doesn’t move at the same pace as digital, and for design reuse. So we could use a tile that meets today’s needs – say a 28G transceiver – then come out in the future with a 56G PAM4 tile and a 28G NRZ tile. In the same process node time frame, we can deliver two very different types of product.”

This is the concept underpinning the MX. “Parallel memory is becoming a huge challenge,” Inkeles observed. “You can continue to use parallel interfaces, but with the memory right next to the FPGA to maintain signal integrity and reduce power. But, while Hybrid Memory Cube (HMC) is a good solution, it has to be serial,” he continued, “as you can’t get signal integrity on a 72bit wide datapath. Or you can put memory in the package.

“By providing up to four stacks of four DRAM dice, we’re providing a memory bandwidth never seen before. Each stack can run to 256Gbyte/s, so four stacks give 1Tbyte/s. That’s unprecedented and can’t be achieved with HMC.

“Power consumption is reduced because the memory is right next to the FPGA and drive strength is much smaller – only pJ/bit – because you’re not driving signals to a memory that could be 6in away.”

There is a downside, however; it’s an expensive solution. “You’re paying for bandwidth,” Inkeles admitted. “But customers complain about the effort it takes to do board layout and to get the DDR chips right. We’ve solved that without using any I/O or transceivers. And if 16Gbyte of DRAM in package isn’t enough, you still have transceivers and I/O available for use with external components.”

Inkeles pointed to three broad application areas for the MX device. “There’s high performance computing (HPC), cloud computing and data centres, but they all look for different things.

“HPC says ‘give me everything, while cloud says it’s worried about the cost per bit. Data centres can build algorithms in logic, which is quicker than a GPU, but need the memory bandwidth to ‘feed the beast’.”

Apart from imaging applications, such as medical and radar, Inkeles says there are applications in wireline communications. “Gone are the days of just routing traffic,” he said. “Everyone is now looking to differentiate their products, for example, by providing statistics on the data being handled. So they need to hold a piece of traffic for a moment to analyse what it is, then send it onwards. This couldn’t be done before because there wasn’t the bandwidth.”

MX is the first implementation of PSG’s strategy and the interesting thing is ‘what comes next?’. It’s quite possible that optical functionality might appear at some point in Intel PSG’s Stratix 10 parts.

Five years ago, Altera announced plans to integrate optical interfaces into its FPGAs as a way to cope with increasing communications bandwidth. Despite demonstrating the technology later in 2011, the idea remained on the shelf. Inkeles said: “We have continued to evolve the technology, but haven’t gone public with the developments.”

Inkeles noted: “Although PAM4 offers a way to stay in the electrical domain, we will, at some point, run out of capability and we’ve been preparing for that transition. Now we have transceivers on tiles, we can take out one tile and replace it with an optical interface.

“We’ve been working behind the scenes,” Inkeles continued, “but the right time to put a product into the market will depend on the economics.”

Altera’s acquisition by Intel also gives it access to silicon photonics technology. “We have exciting capabilities,” Inkeles added.

* Heterogenous 3D system in package integration could enable a new class of FPGA based devices

Another potential step is integrating such components as analogue, ASICs and CPUs alongside an FPGA. Intel PSG says EMIB offers a simpler manufacturing flow by eliminating the use of through silicon vias and specialised interposers. The result, it claims, will be integrated systems in package that offer higher performance, less complexity and better signal and power integrity.

Inkeles sees this as potentially a new market. “ASICs have become smaller and faster, but not cheaper. Unless you’re going to sell millions, you will have a tough time,” he said. “ASSPs are going away, unless you can find more customers or more volume.”

Is it possible that Biran’s vision of ‘standard products’ might be close to reality and could that even include custom versions of a Stratix 10? “Will we do custom?,” Inkeles wondered. “It’s within our ability. It’s not something we’re promoting, but we are engaging with customers.

“We have a range of options. Now we’re part of Intel, the ‘sky’s the limit’. As Altera, we developed HardCopy and had an ASIC team, but it wasn’t our core competence. But Intel Foundry can do ASIC,” he concluded.

From the reddit discussion[0], this appears to be a misreading of the law and it is actually talking about online ad publishers blocking competitors' ads through malicious software.

[0] https://www.reddit.com/r/worldnews/comments/4u2jd4/china_wil...

Nope, I have nothing to do with the blog or Pyston. Sorry if I gave that impression.

Database died. Google cache: http://webcache.googleusercontent.com/search?q=cache:5V0TMa0...

The gist of it is:

* Python spends almost all of its time in the C runtime

This means that it doesn't really matter how quickly you execute the "Python" part of Python. Another way of saying this is that Python opcodes are very complex, and the cost of executing them dwarfs the cost of dispatching them. Another analogy I give is that executing Python is more similar to rendering HTML than it is to executing JS -- it's more of a description of what the runtime should do rather than an explicit step-by-step account of how to do it.

Pyston's performance improvements come from speeding up the C code, not the Python code. When people say "why doesn't Pyston use [insert favorite JIT technique here]", my question is whether that technique would help speed up C code. I think this is the most fundamental misconception about Python performance: we spend our energy trying to JIT C code, not Python code. This is also why I am not very interested in running Python on pre-existing VMs, since that will only exacerbate the problem in order to fix something that isn't really broken.

I love this adaptation of it too: https://youtu.be/7tScAyNaRdQ

Paywalled. Mirror or bypass anywhere?

DNS looks fine, NS and SOA records showing up. CDN subdomains are working fine too.

There's no A or CNAME record on the root domain, but has there ever been one?

Someone in London too. Not as stable, though. He hopped on it and promptly fell over ;)

Yes, sorry. Just missing the golden days ;)

Cute, but doesn't really compare to non-js stuff: https://www.youtube.com/watch?v=qQNIKOD6WnY

The second tab: 'Where digital meets Nature' has a brief summary of how it works. Sounds like a grid of magnets:

"In the front, the display has a basin comparable to an acquarium in which Ferro Fluid can move freely. Behind the scenes powerful electromagnets enable Ferollic to influence the fluid’s shape, to pick it up and move it around. Both modules, the basin and the electronics, sit secure in an aluminium frame."

Mirror: https://docs.google.com/spreadsheets/d/1LZx6Bis0L9bZ-B4jDvma...

Promises still run in the main thread and will block other javascript. The purpose of this hack is to move the parsing out of the main thread.

Artificial artificial intelligence is still your best bet.

My company does a ton of transcription and we tried a bunch of automated solutions, but they all failed for normal speech. They can catch certain phrases and attempt to interpolate, but it always turns into a jumbled mess when the talker stops enunciating perfectly (<10% accuracy).

Human-powered transcribing services cost a few dollars per minute and give quality assurances.

Broken on my desktop Chrome/Firefox as you're using Modernizr.touch to toggle between clicks and touches, which only detects support for touches, not an actual input device.

10:49 AM PST We are currently experiencing elevated error rates for the AWS Management Console in the EU-WEST-1 region.

http://status.aws.amazon.com/

Thank you, that was my gut feeling as well.

Would you mind sharing the reason why YouTube shut you down or a list of rules that are easy to break?

My boss is adamant to move some of our video (days of footage per project, multiple projects per year) to YouTube and I couldn't find a hard reason not to do it. Supposedly YouTube won't display ads if the videos are unlisted or private.

http://living-lens.tv/

Not targeted at consumers and more of a research tool for videos, though.

It would've been ok to post a text/blog post about it, but linking directly to a page that bans you is irresponsible and will likely just get flagged.

Is the bug that one can select both options or has it always been like that?

There is just no need to.

It's small, so the overhead of fetching it is minimal. Once fetched it can be cached practically indefinitely and re-used by any sites that uses the same CDN, while still making live updates possible.

Bundling it would only provide a stale version, add bloat and open up a floodgate for other inclusions.

That networking and building contacts is an important part. Being smart and learning the material while skipping all the classes and social events won't give you all the benefits.

The effect conveys geometries and dimensions when activated that would otherwise require an animation. For simple objects this could save bandwidth and be resolution independent.

While I do not advise using it everywhere, it is just one use case that I do not have a problem with and that could be a useful part of a designer's toolset. Think of it as a 3D version of animated SVG. I only noted this because most other uses of WebGL are unnecessarily flashy and irritating.