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akuma73

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This isn't totally surprising.

x86 vs. ARM/RISC-V has fewer registers which can mean more spill/fill to the stack which results in more instructions to do the same work.

The instruction decode length for x86 has been creeping up with 64-bit encodings and SIMD extenstion (prefix bytes) as you can see it's 3.96 for x86 vs. 4.00 for ARM.

They should drop their custom ASICs and just stick a Qualcomm Snapdragon as a replacement. They could use Android and create a platform with an app store with APIs to access their sensor. Opening up the hardware in this standard way to developers would really add a lot of value to their cameras.

I have no idea why they haven't done this already.

The cortex m0/m3 CPUs most certainly do have breakpoints, svc (trap), interrupts and an optional memory protection unit.

The Atmel CPU is more constrained but still has hardware breakpoints, IO instructions, watchdog timers and interrupt support. It also has far more complex addressing modes (more CISC-y) to save on instruction counts and a variable length instruction set encoding where memory space to store code is a first order concern.

I’m also sure there is a memory controller to control the SRAM.

So, even if you were to build a simple micro controller, you’d need a lot more features and most likely higher performance (and power efficiency) than you would get from a trivial 2-stage pipeline. Not to mention there are no instruction or data caches in this RISC-V machine.

Sorry to burst any bubbles here, but this is s very incomplete implementation.

You couldn’t run anything but small toy programs on this machine. This is more like what a student would build in an undergraduate course in computer architecture.

For example, there is no MMU, no debug support, no traps, no interrupts, no exception handling, no OS privledge levels, no FP, no memory controller etc.

Of course, one wouldn’t implement all of these in a few hours.

The fact that this is RISCV is somewhat of a red herring as you could do a similar thing with a restricted subset of MIPS or ARM or even x86 as they do in UT Austin’s comp arch class.

Not all math is beautiful IMHO.

The proof of the 4 color theorem "reduced the infinitude of possible maps to 1,936 reducible configurations (later reduced to 1,476) which had to be checked one by one by computer and took over a thousand hours."

Of course beauty is subjective and not well defined. Some might consider that proof beautiful.

As a shareholder, they should raise the dividend. If you can't find opportunity to invest the money, it should be returned to the shareholders. I'm all for keeping cash around for a rainy day or for future opportunities but not 33% of your market cap. That is an absurd misallocation of capital.

I had a different college experience. A degree in computer engineering required very little coursework outside of engineering. Due to human nature, I ended up hanging out with primarily other engineering students. All of the non-academic socializing, in retrospect, was very limited to a narrow college bubble.

It was only after I graduated and lived in the real world for a few years that I felt more 'well rounded'.

The tools to become a 'well informed citizen' should be taught at the high school level since not everyone goes to college.

That's right.

The stock price reflects the market's overall expectation of all future cash flows discounted to the present value - all the way out to infinity.

When you buy at stock, you are implicitly betting that reality will exceed those expectations.

So, you just said that massive growth is priced in, and the fact you hold the stock implies that you are betting on even more massive growth - relative to expectations.

WhatsApp is 'just SMS' but it was bought for 20+ billion.

Twitter has a multitude of opportunities to monetize their user base. Their management has just done a poor job.