Micron Automata Processor – A Brief Introduction

http://files.shareholder.com/downloads/ABEA-45YXOQ/2856943415x0x714620/f72a92f0-5ace-4a6a-a124-f296c24f4573/

by crb002 • 12 years ago

111 50 12 years ago

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erikj• 12 years ago

Here's more: http://www.micron.com/~/media/Documents/Products/Other%20Doc...

greglindahl3• 12 years ago

Good: a memory vendor finally getting serious about "processor in memory" silicon.

Bad: Doesn't mention all the research that was done on these sorts of things already. I mean, it makes a great story that you invented the whole thing from scratch, but nothing screams "this is a slick marketing doc" more than pretending that sort of thing. Or maybe they did ignore the literature and made a bunch of mistakes as a result?

Edit: wow, the scientific paper does the same thing.

crb0023• 12 years ago

What are some of the good papers?

greglindahl3• 12 years ago

PIMs are outside my field, but Wikipedia looks like a reasonable start (http://en.wikipedia.org/wiki/Processor-in-memory).

troymc• 12 years ago

If you do a search for "Cellular Automata Machines" on Google Scholar, you'll have a good start.

The idea of cellular automata was first developed by von Neumann and his colleagues back in the 1940s.

wsxcde• 12 years ago

This (http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumb...) is one of the classic papers on PIMs.

eloff2• 12 years ago

I hope the refs reject it. That's unacceptable to have a paper that was written by a marketing department. There's nothing new or original about FPGAs. They make it sound like they invented the concept. They may have improved on it, but they didn't talk about the specifics of that.

crb0023• 12 years ago

They already got one accepted to IPDPS 2014, "Finding Motifs in Biological Sequences Using the Micron Automata Processor" http://www.ipdps.org/ipdps2014/2014_%20advance_program.html

TrainedMonkey2• 12 years ago

I had a professor mention concept like this during microprocessor class. Basically idea comes from efficient organization of CPU cache. Using LRU queue, instead of having 4 way associative cache with each memory location tied to a specific spot in one of those 4 banks. Issue with LRU queue is that you would need to search all memory tag locations to determine if any of them store correct address. That is a boatload of transistors to accomplish it within latencies demanded of CPU cache, so we have cache with only 4 [1] locations to search for each memory address. It looks like micron figured out a way to place some logic close to memory chips to search entire memory for matching pattern. Would be interesting to know how they did it.

[1] Number of locations to search depends on associativity of the cache. I used 4 way associative cache in my example.

p1esk5• 12 years ago

With a regular 4-way associative cache you search 4 tags to find the right block. With fully associative cache, you search all tags (where a tag would mean an entire block number), and it is typically implemented with CAM, where "some logic [is placed] close to memory chips to search entire memory for matching pattern".

Is that what you're describing? Are you saying Micron invented some form of CAM?

marcosdumay3• 12 years ago

Good: a memory vendor finally getting serious about "processor in memory" silicon.

Let's face it, Moore's Law is dead. Now we must extract the sub-exponential gains that come from architecture optimizations, and Non-uniform memory can lead to huge ones.

It's time to finally take the challenge of programming such exotic kinds of computers. The good news is that now our computers are good enough to help us.

p1esk5• 12 years ago

Moore's Law is dead.

What makes you say that? Intel would certainly disagree...

bamakhrama• 12 years ago

The slides are misleading. "Memory Wall" refers to the fact that CPU speed has been doubling every 24 months from 1960s till early 2000s (annual improvement rate is 50%), while RAM memory speed doubles every 10 years (annual improvement rate is 10%). This "memory wall" is there regardless of the processor architecture that you use.

wlesieutre2• 12 years ago

Math nitpick: It's a bit more complicated than that with exponential growth. You can't divide up 100% over 10 years and say it was 10% each year, instead you have to solve 2=1.1^x, and find that it doubles in 7.27 years.

If something grows 10% a year for 10 years, it actually ends up at 2.59x its original size.

greglindahl3• 12 years ago

Rule of 72: doubles in 10 years, annual %age is 72/10 = 7.2%. Close to the right answer, easy to do in your head.

http://en.wikipedia.org/wiki/Rule_of_72

majke• 12 years ago

"Deep packet inspection to monetize traffic"

Whoops.

smoyer5• 12 years ago

Excuse me! ... I'm with the NSA and we really need to monetize some traffic. Have you seen our budget?

agumonkey3• 12 years ago

So this is like going from SMTP to IMAP ?

smoyer5• 12 years ago

I didn't down-vote you, but if you were serious I think you should find a profession outside of technology.

agumonkey3• 12 years ago

I was almost serious, skimming through the diagram gave me the impression they were moving computation capabilities close to the data ~backend.

dandelany• 12 years ago

What a rude, condescending thing to say to someone who is asking for help understanding something.

wmf• 12 years ago

The NSA processor—now available commercially!

ars• 12 years ago

So, when can I get one and start mining bitcoins? Or since it's all about memory, litecoins?

eloff2• 12 years ago

With bitcoin we passed the FPGA mark a while ago, now it's all about custom ASIC chips.

ChuckMcM• 12 years ago

Micron demonstrated early versions of this at Microprocessor Forum in 2004 or 2005. So it isn't exactly "new" but being able to actually get one is.

Pattern algorithms are pretty difficult to synthesize however, see the Conway Glider search as an example. One of the challenges is that the set of 'instructions' and the solution possibilities are quite tightly interlinked. I hope that I can get my hands on one at some point, some of the old texture research from the Image Processing Institute would really fly on this thing.

rasz_pl• 12 years ago

Cant wait for Stephen Wolfram to claim it his own invention.

windexh8er• 12 years ago

I think there's more here than most comments reflect - yes, this is being done in many implementations today, but not nearly as efficiently. 4W for 1Gb of DFA stream analysis? That's pretty crazy considering that can put full on content inspection in a SOHO device that can end up in consumers networks. DFA is the shift from file based scanning in network security and offers parallelism efficiencies far beyond most of the UTM type platforms out there today. There are only a few companies using stream based platforms (Palo Alto Networks is one) and this is why the platform can do much more content scanning in one pass vs the legacy devices.

But, this is killer for SOHO networking IMHO. Puts a ton of power into the next wave of network security.

dkural• 12 years ago

The bioinformatics slides in that presentation make no sense. The image shown doesn't map in any way to the bullet points.

Micron Automata Processor – A Brief Introduction

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