Project Oberon: Design of an operating system, a compiler, and a computer [pdf]

The largest chapter of the 1992 edition of this book dealt with the compiler translating Oberon programs into code for the NS32032 processor. This processor is now neither available nor is its architecture recommendable. Instead of writing a new compiler for some other commercially available architecture, I decided to design my own in order to extend the desire for simplicity and regularity to the hardware. The ultimate benefit of this decision is not only that the software, but also the hardware of the Oberon System is described completely and rigorously. The processor is called RISC. The hardware modules are decribed exclusively in the language Verilog.

I wonder how it compares to Nand To Tetris. Other than that, it seems really interesting. Has anyone read it?

0823498723498722• 3 years ago

It's much less pedagogical than Nand to Tetris; if you need the background, read that first, then read this.

(he eventually ported the hardware description to his own HDL, Lola)

kragen5• 3 years ago

oh i had no idea, i have to see this. does lola support any existing fpgas?

i_don_t_know2• 3 years ago

Project Oberon describes the final system as it is. It’s not a tutorial that takes you step by step from the basics to a complete system.

hnthrowaway0328• 3 years ago

Nand2Tetris is the perfect introduction project of this field that spans Hardware, OS and compiler design. That said, I completed the project and found it lacking depths and in-depth investigation of all topics. But this is what makes it the perfect introduction project.

The University of Tokyo has a similar project that I believe can serve as a stepping stone. Check out the CPU experiment: https://ytsmiling.tech/2017/04/02/cpuex.html

If you don't like it (probably due to lack of documentation), at this stage you can also design your own projects. Basically a CPU sub-project that uses Verilog or any HDL, which leads to an OS and compiler project.

retrac• 3 years ago

As another user said, it's not oriented towards a beginner. You would want some, maybe most, of the background in NAND 2 Tetris first. Chapter 16 about that mentioned processor for example, and it just throws you in the deep end with the Verilog code. Here's the CPU interface with the system bus, the registers, and how the multiplier unit works.

The good part is the commentary about the design decisions and trade-offs. That is invaluable, because it is the wisdom of Niklaus Wirth, towards the end of his career, drawing on a lifetime of experience. He was one of those rare polymaths, with a broad and deep understanding, of both the circuitry, and the more abstract parts of CS. He always generalized, tried to understand the principle, and places things in their historical context and explains how they developed. Because it's Wirth, the history lesson is often based on personal experience. It produces a good synthesis, in my opinion. For example:

The second [interface] (MouseX) is included here for historical reasons. It was used by the computer Lilith in 1979, and used the same Mouse as its ancestor Alto (at PARC, 1975). It is distinguished by a very simple hardware without its own microprocessor, which is currently contained in most mice. This goes at a cost of a 9-wire cable. But today, microprocessors are cheaper than cables. We include this interface here, because it allows for a simple explanation of the principle of pointing devices.

kragen5• 3 years ago

the wirth-the-risc processor is immensely simpler to describe and program than the tecs/nand2tetris processor, which borders on unusable. i've gone through the process of 'designing' the nand2tetris processor on nandgame, and i'm pretty sure the nand2tetris processor is simpler to wire up from gates. but the wirth-the-risc processor is a lot easier to get running on an fpga or, i bet, to simulate with verilator, because it uses a real hdl instead of something that someone who's never designed hardware thinks an hdl might look like. probably the nand2tetris processor would require less code in verilog if you coded it up, quite similar to chuck thacker's 'a tiny computer for teaching' https://www.cl.cam.ac.uk/teaching/1112/ECAD+Arch/files/Thack... which is, like the nand2tetris processor, based on the dirty genitals nova architecture

nand2tetris will get you from nand gates to tetris and to bytecode interpreters. but oberon will get you from synthesizable verilog (which can be easily converted into nand gates but almost never is) to a fully usable gui operating system that can recompile its own source code. sadly it cannot resynthesize its own fpga bitstream because you cannot run vivado on it (though i see 71bae0447c737f454371dcf3b84fc62c says below it can at least simulate its own hardware)

a thing they both have in common is the lack of a usable name for the processor architecture

pjmlp• 3 years ago

After this follow up on the Oberon System 3, with its Gadgets component model, and a mix of JIT/AOT compilers,

"The Oberon companion - a guide to using and programming Oberon System 3"

https://www.semanticscholar.org/paper/The-Oberon-companion-a...

You can access the source code from Rochus fork,

https://github.com/rochus-keller/OberonSystem3

Or the Active Oberon evolution, although not directly done by Niklaus Wirth,

https://gitlab.inf.ethz.ch/felixf/oberon

Screenshots and OS Manual,

https://gitlab.inf.ethz.ch/felixf/oberon/-/blob/main/ocp/Doc...

Or Component Pascal and Blackbox IDE, created by a startup out of ETHZ

https://blackboxframework.org/index.php

Rochus• 3 years ago

The Active Oberon evolution started with the Active Object System (AOS) and the Bluebottle window manager; the source code of the last "Current" release can be accessed e.g. here: https://github.com/OberonSystem3/AOS_Bluebottle_Sources. If you want to study the source code, you can use this tool: https://github.com/Rochus-Keller/ActiveOberon.

guidoism• 3 years ago

I re-typeset the text in TeX and have a nicer looking PDF for those that care: https://github.com/guidoism/tex-oberon

zvmaz2• 3 years ago

I really liked reading the README. It shows that you are passionate about Project Oberon and the book. This in turn motivates me to read it. Thank you for your work.

sydbarrett74• 3 years ago

Thank you for your hard work and dedication in keeping this alive.

loup-vaillant• 3 years ago

Awesome! I'm guessing there's a not-too-hard way to change change the paper format? I'm thinking of going to A5 so I can bind myself a nice book.

kragen5• 3 years ago

thank you so much

this must have been a huge amount of work

berkeleynerd2• 3 years ago

Is it possible to use this version of the book to follow along and build everything without having to source the original FPGA board Wirth was using?

cxr• 3 years ago

Yes, but if you want to actually run the programs, you'll need an emulator.

ikhare• 3 years ago

Back when I took compilers in college we wrote a compiler for Oberon. I couldn’t quite find my original class site, but this one seems roughly right (from a few years before I took the class): https://cseweb.ucsd.edu/~wgg/CSE131B/

It was a great teaching language.

I_am_tiberius• 3 years ago

In an interview with Niklaus he was talking about a 500 page document...

whartung• 3 years ago

The original 1992 book is longer. As mentioned earlier the code generation chapter is smaller because the RISC CPU is much simpler than the original.

But, also, the original, I think, has much more source code. I don’t know if the original book contains the entirety of the system, but the new one seems to contain more highlights of interfaces and selected examples. It likely relies on the ubiquity of source availability on internet, which clearly was not the case in 1992.

fmeyer• 3 years ago

The idea of an education computer is bugging my mind in the last 5 years.

If you consider modern hardware and OS is practically impossible to have a simple enough machine that you could teach the young generation. Fantasy consoles like pico-8 are good options for programming, but not for understanding the hardware underneath. That way you still have school who use old architectures for teaching.

bpye• 3 years ago

A minimal RISC-V implementation is quite simple. There is a RISC-V implementation of xv6 - though that’ll require slightly more than the absolute minimum RISC-V implementation, specifically you’ll need CSRs, M, S and U mode and paging.

If you don’t care about paged memory you could do with just M and U mode. I have a small rtos that targets some of the WCH microcontrollers with that configuration. It does use the PMP but even that isn’t really necessary.

ysofunny2• 3 years ago

why would anybody NOT care about paged memory?

or maybe a better question is, why care about it? as far as I've understood, paged memory is a legacy from a time where cheap and fast memory wasn't a thing

how feasible is it to get rid of memory pages? I guess the hardest thing would be untangling interprocess memory safety from pages??

kragen5• 3 years ago

this sort of exists at https://github.com/cksystemsteaching/selfie (http://selfie.cs.uni-salzburg.at/)

Selfie is a self-contained 64-bit, 12KLOC C implementation of: (...) a tiny (...) subset of C called C Star (C*) (...) to a tiny (...) subset of RISC-V called RISC-U[;] a[n] (...) emulator (...) that executes RISC-U code[;] (...) a (...) hypervisor (...) that provides RISC-U virtual machines

so they have a self-hosted instruction set architecture, compiler, and operating system, though the operating system is much simpler than xv6. because the instruction set is a subset of risc-v you can run its code on actual risc-v hardware (or qemu-system-riscv), but presumably you could also design risc-u hardware in verilog that was simpler than a full implementation of rv64i with whatever extensions the hypervisor needs

ysofunny2• 3 years ago

I think that somehow a computer than can learn to talk to other computers would be the pinacle solution

this is within reach now with LLMs, the remaining challenges would be somehow connecting the computers (a hardware compatibility issue) but the software should be able to figure the other software out somehow

TillE• 3 years ago

Vintage 8-bit hardware is extremely comprehensible, and it teaches you fundamentals which absolutely still apply today. Ben Eater's YouTube videos are fantastic for this, both his 6502 project and his homebrew "from scratch" breadboard computer.

flamedoge• 3 years ago

pretty good to save for post apocalyptic renaissance

abdellah123• 3 years ago

This is a jewel. Is there an attempt to repurpose oberon as a mobile "computer"?

berkeleynerd2• 3 years ago

Has anyone updated the book to allow one work with newer FPGA boards?

Project Oberon: Design of an operating system, a compiler, and a computer [pdf]

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