Synchronous Processors (2016)

https://www.yodaiken.com/2016/05/11/synchronous-processors/

by palmtree3000 • 4 years ago

30 19 4 years ago

dmitrygr4• 4 years ago

And how would you do context switches if a CPU-bound task does not yield and you do not have interrupts to ... interrupt ... that?

johndoe08153• 4 years ago

One approach is to use a barrel processor which switches threads after each cycle or instruction: https://en.m.wikipedia.org/wiki/Barrel_processor

freemint2• 4 years ago

That does not solve the problem at all. It just increases the number of "hyper threads", if a new process gets started and all cores are busy that process might never run.

freemint2• 4 years ago

The article says this about it:

We could have a simple cycle timer switch on each core so that after the timer expires there an interrupt-like jump to a function to see what to do next. That jump would be perfectly synchronous since predicting the next jump can be done with 100% accuracy (or nearly 100%).

dmitrygr4• 4 years ago

Cycle accurate? So now you can predict how long RAM latency is down to the cycle, refreshes and DMA be damned?

Interrupt like? So what will you do? save context of this thread, load another...hm...sure sounds like what we already do

Taniwha2• 4 years ago

In other words a timer interrupt - with saving of state and appropriate unwinding of pipeline state (abandoning half done or out of order instructions etc etc)

Also the "do system calls by queuing requests to another CPU" is kind of at odds with "we don't need cache coherency"

bob10293• 4 years ago

What if you have multiple CPUs and you don't want the task to yield (i.e. for performance or latency reasons)?

dmitrygr4• 4 years ago

That limits your OS to numThreads < numCpus

johndoe08153• 4 years ago

The Transputer and its successors, the XMOS embedded SoCs, already implement a lot of the features mentioned in this blog post by Yodaiken.

…and the subject should have “(2016)” added…

saagarjha• 4 years ago

Fixed.

projektfu• 4 years ago

This article would make more sense if it had the result of a simulation of a workload showing how much time was lost to interrupt latency and how much processor time could be saved by a different technique.

Synchronous Processors (2016)

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