In short, I would say.
(Main) advantages: - The Cx syntax is a lot easier to learn/debug than VHDL and Verilog (and SystemVerilog, and SystemC) - Cx is easier to use for making more complex systems (it's a structured language with Control structures, Subroutines, blocks, etc). - Being easier to use, Cx allows you to write programs faster. Generally these programs are also easier to debug and easier to maintain. Furthermore, it's easier to manage large, complex programs in Cx. - When you do need to have a really low level of abstraction, you can use VHDL/Verilog and call it in Cx
We are here to help people doing better hardware, and to open it to a majority of engineers so I don't think that fully understanding the difference (...) really matters.
Nothing is wrong with the syntax however it's too tedious and complex. In this simple example it's ok but the more larger the FSM the more complexity to handle.
How is this a different thing? The init is the same as a loop (n = 0; n < 5; n++) in software ... It's just more complex to write. I would rather say that you can do the same in C using a switch case statement... but who will code C that way today?
Yes it is complex and error probing, and that is precisely why it is our duty to make it more simple. Handling and preventing the problems is the job of the compiler so hardware makers can focus on what's matter not on these kinds of complexities.
Clocks (and resets) can be either implicit or explicit. By default you only have one clock and reset, and if you need more you can explicit them - http://cx-lang.org/documentation/properties