The PowerPC 600 series, part 1: Introduction 8 years ago
r0 was 0 only for addi/ addis and as rA=0 in EA calc for load/store, so you got 32 registers to store things into. The assembler should have implemented the simplified mnemonics.
addis/addi was the suggested way to load a 32-but value in the Compiler Writer's Guide to take advantage of some mythical 3-input adder hardware, but was there ever an implementation that actual had one and a fetch/issue that supported it? Not in 603/604 afaict.
ETA: [stuff about mtcr serialization which I misremembered.] The early stuff had low penalty branch mispredicts, so you would just do andi. or cmpi and however many branches.
SPR numbering included non-problem state (privileged) registers. That's why it's sparse looking from user space.