I'd CNC machine that part, which is much more expensive in-quantity than the casting option but for a handful of prototypes gets you there quickly.
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bartlettD
You could look at ClinicalTrials.gov, you can quite easily search for completed, phase 3 trials example.
https://clinicaltrials.gov/search?aggFilters=phase:3,status:...
Likely some kind of Electro-Optic Modulator. You could use their wavelength comb to separate the light and then use a Mach–Zehnder interferometer to perform On-Off-Keying as an example
Have you ever heard that "the market can stay irrational longer that you can stay solvent"?
The thing about bubbles is, you can often easily spot them, but can't so easily say when they'll pop.
As a practicing EE and naive programmer, It is pretty hard to build a simulation engine for electronics and even harder to build a performant engine. SPICE does this with huge matrices of differential equations and math tricks.
Theres an interesting article by Mike Engelhardt (author of LTspice) which gives hints on the details of their implementation.
https://www.analog.com/media/en/technical-documentation/tech...
“But Graham,” I hear you protest, “I see these practices recommended in vendor’s datasheets all the time! Surely they can’t be wrong? They’re professionals!”
The 100nF value for decoupling became so entrenched because it works well enough* most of the time, so you don’t need to even think about it. By eliminating trivialities you can focus your brain-juices, spoons, or whatever else you want to call them on more challenging tasks.
So the argument in this article is that we should ignore this triviality and spend more time precisely tuning decoupling capacitor selection on top of designing the rest of the system?
Software people would call this premature optimisation, no?
Piggybacking onto this comment, but another reason for external pours is thermal performance. A copper pour on the surface on the PCB allows heat to convect off the board more easily. The gains aren't massive, but they can help as part of a larger thermal management scheme.
I've also heard, possibly apocryphally, that in the old days when we used harsher chemical etchants, removing all of the copper from unused sections of the PCB would increase the risk of thinning the traces beyond what was intended. So in those cases a copper pour would reduce the time the PCB would need to spend in the etchant bath.
I was not expecting a Worm reference in this thread, well done.
Link to the actual paper for those interested.
https://www.nature.com/articles/s41467-024-48534-4 (Open-Access)
I had wondered why they weren't doing this in simulation but didn't realise that Finite Element Analysis gets weird in the regions they're exploring.
Reminds me a lot of the "Chemputer" concept for automated chemical synthesis expriments. https://www.chem.gla.ac.uk/cronin/
According to police, the worker had initially suspected he had received a phishing email from the company’s UK office, as it specified the need for a secret transaction to be carried out. However, the worker put aside his doubts after the video call because other people in attendance had looked and sounded just like colleagues he recognized.
Regardless of the sophistication of the deepfake, surely this rings huge alarm bells, right? I'm not even sure I'd be comfortable making secret transactions on instruction from my boss. Even if your boss is actually asking you to do this, how can you have the financial authority to transfer $25M and not the savvy to think that being asked to transfer huge amounts of money in secret isn't going to result in you getting thrown under the bus?
WaveDrom also have a package for making bitfield diagrams (https://github.com/wavedrom/bitfield). Has anyone used both of these? I'd be interested to see how they compare.
Your search term would be "wiring harness manufacturer". I've not come across anyone in this space that would take a web order like PCB fabricators unfortunately, the demand isn't there.
If you need wiring harnesses or other cable assemblies you'd usually make them yourself, buy a COTS cable that is close enough and make your design match that or bite the bullet and go to a fabricator and pay expensive Non Recurring Engineering (NRE) costs. Anyone good will have an IPC-A-620 certificate.
Unless you're Toyota, its probably worth buying your own set of crimp tools rather than going down this route. WireViz is a great tool for documenting cables for your own purposes, but is only part of what would make up a full drawing pack for a wire harness.
Thats odd, I can't see any reference to Creative Commons in my copy. The copyright rests with the Australian Defence Force Journal and is administered by Copyright Agency Ltd as far as I understand.
Good point, from a certain perspective all programming languages are dead and we're actually historical computer-lingusts.
Jim's article pretty much confirms my assumption that Fortran isnt "dead" but is instead more of a de-facto domain-specific language. If you're a meterologist, you'll probably be using Fortran just because all of the existing libraries are built for it.
Unless you're doing scientific computing, Fortran is effectively dead.
The claim here is that "existing hardware fuzzers are inefficient in verifying processors because they make many static decisions disregarding the design complexity and the design space explored".
"To address this limitation of static strategies in fuzzers, we develop an approach to equip any hardware fuzzer with a dynamic decision-making technique, multi-armed bandit (MAB) algorithms." (From their paper: https://arxiv.org/pdf/2311.14594.pdf)
They're saying their fuzzer is faster and better at finding bugs than other fuzzing aproaches.
Systems Thinking goes beyond just causal loop diagrams, which are a useful tool in soft-systems modelling. Systems Thinking is more of a foundational mindstate rather than a set of tools and I think this is something I disagree with the author on.
https://sebokwiki.org/wiki/What_is_Systems_Thinking%3F
Systems Engineering uses Systems Thinking as the root of the apprach but will use any tool available for actually modelling/designing the system. A big one which is used a lot for hard-systems is SysMl (an offshoot of UML, I know) which is again somewhat inpenetrable for outsiders. I think thats ultimately a trap for all domain-specific tools where they need some way of being abstracted for the layman.
For an Engineering Manager, a combination of tools from the Operations Management disciple and Enterprise Systems Engineering is possibly something that might be a bit more useful to you.
Best comment in this thread, a lot of folks seem to be stuck on the etymology rather than the very deliberate use of special keywords in collabrative working.
Sailing, Flight, Surgery; All of these require people to work together, in scenarios where a misinterpreted instruction can cost lives.
The Tenerife Airport Disaster, still the deadliest aviation accident was caused by bad communication procedures. [1]
[1] https://en.wikipedia.org/wiki/Tenerife_airport_disaster#Comm...
EtherCAT is built on top of IEEE 802.3 Frames, you're right that there is a special controller but those interface over MII to a standard Ethernet PHY.
They don't look like valid Ethernet Frames, they are valid Ethernet Frames. Ethercat embeds its Ethertype within the frame the same way that other protocols do.
As you say, EtherCAT does its own thing with the frames, to get the real-time determistic performance it needs, but EtherCAT and other 802.3 Frames can co-exist.
https://www.ethercat.org/pdf/english/EtherCAT_Introduction_0...
Slide 25-32 are a good high level overview of possibilities. Slide 32 shows a setup with Co-Existance.
Another good exampe is the industrial space. Factory machinery used to communicate over serial type interfaces, but now theres a push to move to EtherCAT which is a determistic protocol built on top of Fast Ethernet.
There is a GigE specification now too, but if all you're doing is controlling some motors you don't need that much throughput.
This is really neat! Lots of FPGAs have MAC peripherals or IP Cores but the PHY is usually an external component.
There are some good reasons for that though, I'm not entirely sure that an FPGA can drive hard enough for a useful Ethernet PHY except for parhaps short range stuff, not sure what happens when the isolating magnetics are added.
I wish there was a good IP Core for the IP Stack though, most implmentations of IP Ethernet on FPGAs use a softcore to run the networking stack which bumps up the utilization a lot. I'm absolutely certain a basic IP layer could be done purely in HDL which would go a long way in getting Ethernet going on lower spec FPGAs.
Agreed, its a nice accessible article for beginners. I can see someone who has really only played with Arduinos and Adufruit modules looking at this and getting some inspiration to try out some of the techniques he mentions.
For example, you'd be suprised how many practicing EEs I've met who aren't aware drag soldering is a thing. (Which is a fantastic technique btw, saves so much time and gets you much nicer joints than individually soldering )
He's not using the Arduino Uno for anything useful, its just a test jig to check the cable works. He says at the start of the article that he needs a USB-UART converter to work with another project.
I'm assuming that project doesn't have its own USB-UART like an Uno.
EE is my day job so I may be biased towards more formal resources.
Sparkfun, Adafruit, etc have some good stuff to get you off the ground and building projects almost right away. I think they're great "taster" in how circuits work and what some of the components are for.
Khan Academy has a course for EE, I haven't used it but I've used the site for other stuff like brushing up of my math.
Manufacturers actually make some really nice training materials, if you like analogue stuff, TI's Precision Labs series is a great resource for that. Analog Devices has an intro to electronics wiki series too. https://wiki.analog.com/university/courses/electronics/text/...
For a deeper look, an undergraduate electronics textbook will hold your hand from the very basics through to more advanced concepts. You can ignore some of the more advanced stuff like AC analysis and non-linear components for the most part (Unless they interest you!)
I learned from this book (https://www.pearson.com/en-gb/subject-catalog/p/electronics-...) and found it quite approachable in how it laid out the basics before contextualising them as systems.
Theres also the famous Art of Electronics which is a good book but personally feels a bit dated (even with the new edition) and really analogue heavy. A good reference manual though.
Can't wait to be told to RTFM by some person on the internet because I cant get the security patches to build for an implantable pacemaker.
I don't think we're disagreeing. Devs have no incentive to develop for ARM if there is no market share like you said, so they're not going to buy a $599 kit and its existence won't sway them either.
I think there will come a time when the number of ARM Windows machines increases though.
This kit is useful for the devs who care about the performance of their programs on ARM kit but they'll only optimise for it if the market is there.
The big question is—will this $599 desktop be enough to push more developers towards cross-compiling for native ARM64 software on Windows?
No, more consumer hardware like the Surface series will push devs. Who will eventually want to get out of the x86 emulation layer and run their programs native.
Comparing this to an M1 Mini is a bit odd since they're not competing with each other at all, and Microsoft is limited by what Qualcomm et al can put out.