Designer of the ARM chip discusses energy efficient desgin

http://queue.acm.org/detail.cfm?id=1716385

by tcskeptic • 16 years ago

30 6 16 years ago

queue.acm.org

vii2• 16 years ago

There are many interesting points here, but "programmers will not be able to afford to be ignorant about the energy cost of the programs they write" struck me especially.

I worked in the embedded space and we had rough notions of the (power) cost of using various instructions and hardware blocks -- more or less related to the number of bits flipped (for example adding 0 does less work that adding 0xfffffff).

It would be grand if this filtered down to the mainstream. If a program runs on a million machines, making it more power efficient would be a big win economically, but the programmer probably has no incentive.

Working out big O assumptions for power use on your platform is an interesting exercise!

RiderOfGiraffes• 16 years ago

Sometimes when I'm doing some calculations I know the O(n^3) algorithm will run fast enough, but I also know that if I use the O(n.log n.log log n) algorithm then my laptop battery will last measurably longer. That matters on long journeys without power outlets.

ajross2• 16 years ago

I call your bluff. Worrying about cost of a state change of 32 flip flops on a die with millions of transistors is patently ridiculous. No way could you measure that. No way.

That said, your core point is valid: not choosing the right sleep mode can hurt badly, avoiding polling is important, above all avoid busy loops. On many architectures avoiding FPU or vector instructions can put the units into a power save mode, etc...

But "use as many zeros as possible in arithmetic" can't possible be right.

vii2• 16 years ago

It was easily measurable if you ran the instructions in a loop and looked at the power draw. I can't remember the numbers now but it was definitely significant (maybe 30% on a wide vector instruction?).

I don't know where you got the idea about the flip-flops from.

Adders for example are implemented so that they grow exponentially in the number of bits in size, so that they use a time proportional to the log2 of the number of bits. Note that this means the number of bit transitions in a simple add can be much larger than the number of bits going in, meaning more power draw.

Of course we didn't worry about the instructions inputs in practice.

I think it was cheaper to store 1bits than 0bits ironically.

edit: explain more clearly that larger circuit size means more power drawn

Designer of the ARM chip discusses energy efficient desgin

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